On May 7, NEO Semiconductor announced a major breakthrough in its 3D X-DRAM technology series: the industry’s first 3D X-DRAM cell structures based on 1T1C and 3T0C architectures.
According to NEO Semiconductor, the new technology is designed to deliver unprecedented density, power efficiency, and scalability for the most demanding data-driven applications.
The newly introduced 1T1C and 3T0C designs are built on a 3D NAND-like architecture, with a proof-of-concept test chip expected to be launched in 2026. These designs combine DRAM performance with NAND manufacturability, targeting cost-effective, high-yield production with densities reaching up to 512 Gb—a 10x improvement over conventional DRAM.
Key technical details
Incorporates one capacitor and one transistor, using a 3D NAND-like structure to reduce manufacturing costs. It features an IGZO (Indium Gallium Zinc Oxide) channel to enhance data retention, making it ideal for AI and in-memory computing applications.
Comprises three IGZO-channel transistors—a write transistor, a read transistor, and a storage transistor. The storage transistor retains data by storing electrons in its gate, enabling current sensing. This architecture is designed not only for DRAM but also for emerging memory and AI-centric workloads.
Key features of 1T1C & 3T0C 3D X-DRAM:
Andy Hsu, Founder and CEO of NEO Semiconductor, stated, “This innovation breaks through the scaling limitations of today’s DRAM. With the launch of our 1T1C and 3T0C 3D X-DRAM, we are redefining what memory technology can achieve.”
NEO Semiconductor, a U.S.-based memory company, focuses on advanced memory solutions such as 3D NAND. In 2023, it introduced the world’s first 3D NAND-like DRAM technology—3D X-DRAM. In August 2024, the company unveiled its 3D X-AI chip, aiming to replace HBM in AI GPU accelerators.
(Photo credit: NEO Semiconductor)